An integrated circuit (IC) device may comprise many miniaturized circuits implemented in a semiconductor substrate. IC devices are tested after manufacture in order to ensure proper operation before being sold and used commercially. Thorough testing of an IC device is typically accomplished using complex and expensive external testing equipment. In order to test an IC device, the IC device is mounted on test equipment. In particular, the IC device is connected to the test equipment via a pad ring that interconnects core logic to input/output (I/O) pins. In order to test the IC device, the test equipment delivers test data defining the test to the IC device via the I/O pins and acquires response signals from the IC device in accordance with the test defined by a test program.
Testing an IC device requires verifying functionality and timing for the external interfaces and internal interfaces of the IC device. Example external interfaces include memory interfaces and bus interfaces such as a peripheral component interconnect (PCI) bus, an advanced high-performance bus (AHB), an advanced extensible interface (AXI) interface bus, a small computer system interface (SCSI) bus, an Ethernet bus, a universal serial bus (USB), an advanced graphics processor (AGP) bus, a serial advanced technology attachment (SATA) bus, and other external interfaces that operate at high frequency. Verifying functionality and timing of external interfaces involves using a host computer to develop test programs and generate trace files for the external interface under test by running simulations. Once the trace files, also referred to as test vectors, vectors, or test data, are ready, the test data is loaded onto the test equipment. The test equipment supplies test signals to the IC device in accordance with the test data and acquires response signals from the IC device via the I/O pins.
During the test, the operation of the IC device is tested in both transmit and receive modes. In a transmit mode or receive mode the test equipment supplies signal transitions as per the test data and the IC device generates corresponding response signals. The test equipment then validates the responses as per the test data. Upon completion of the tests, the test equipment or, more specifically, the host computer, interprets the response signals. The host computer may interpret the results by comparing the response signals generated by the IC device in the transmit and receive modes to simulated results. The host computer generates a report that indicates whether or not the IC device passed the test based on the comparison.
In addition, for each test vector, the IC device may be tested for a variety of operational conditions, e.g., temperature, voltage variations, and process corners. Moreover, the test equipment may be required to generate signal transitions at or above the maximum operational frequency of the external interface. As the complexity and clock frequency of IC devices increases, the frequency at which test equipment channels operate also needs to increase to reliably test the IC device. For example, since the clock frequency of fast memory devices increases on an almost annual basis, test equipment needs to be upgraded, modified, or even replaced in order to test these devices at high operating frequencies. In other words, IC devices cannot be tested at their maximum clock frequency using older test equipment that was built for testing devices that operate at slower frequencies. Thus, test equipment must be upgraded or purchased and new test programs developed with each advance in clock frequency, thereby increasing the cost of new IC devices.